Desktop PC Memory Upgrade

Following DDR and DDR2 memory, the next synonym on PC memory is, of course, “DDR3”. While Intel has promised delivery of DDR3 memory system on PC’s in Q207, the picture is still not clear. This article examines the difference between DDR2, DDR3, and performance difference on using DDR3. It also predicts the consumer sentiment and adaptation time table.

Difference between DDR2 and DDR3

Higher operational frequency

According to JEDEC, DDR3 will be running at 800MHz to 1666 MHz. That would double the frequency of DDR2. This will bring operational performance to systems by slashing the read and write time into half.

Lower voltage and power

DDR3 operates at 1.5V instead of the 1.8V for DDR2. The power saving factor is, therefore, 16%. This will offset the higher power consumption brought by increasing the operational frequency. At the same time, die shrinking will also help in power reduction to give DDR3 twice the performance per watt of power.

DDR3 is also built-in with power conservation features like partial refresh. Precious system battery power will no longer need to spend on refreshing the portion of the DRAM not in active use. It also included a thermal sensor to allow the system to provide minimum refresh cycles when the system is not in high performance demand thus to achieve further power saving.

More internal banks

To further speed up the system, DDR3 consist of 8 internal banks vs 4 internal banks on DDR2. As the size of the DRAM increases, this will allow advance pre-fetch to reduce access latency.

Mode register difference

Because of the many feature selections, the initialization on DDR3 takes a new approach. The Mode Registers (MRS) are re-engineered for quicker and more efficient configuration of the memory system.

Modules on fly-by topology

For the higher frequency operations, DDR3 is now more critical on signal integrity of the memory module (DIMM). At the extreme frequencies, the signal path can no longer be balanced, but have to be tuned (trained) to match to each DRAM. The module signal path topology is called the “fly-by” vs. “T branches” as on the DDR2 module. That means the address and control lines will be a single path chaining from one DRAM to another instead of the T topology that branches on DDR2 modules. This method takes away the mechanical line balancing and turn to automatic signal time delay generated by the controller fixed at the memory system training. Each DDR3 DRAM has an automatic leveling circuit for calibration and to memorize the calibration data.